(1) Field of the Invention
The present invention relates to a solid-state imaging device, and to a technique for digitally outputting a light receiving signal obtained with photo electrical conversion in a solid-state imaging device.
(2) Description of the Related Art
Recently, a rapid increase in the number of pixels in a solid-state imaging device has required the signals to be read-out at a high speed from a solid state imaging device.
An early solid-state imaging device is structured to obtain a digital signal from an external AD (analog-digital) conversion unit by reading-out an analog signal, out of the solid-state imaging device, obtained as a result of photo electrical conversion in a pixel circuit. This structure has reached to a limit of improving the read-out speed due to an internal stray capacity in the solid-state imaging device.
In order to solve this problem, there is a well-known technique for achieving a high-speed signal output by converting the analog signal obtained from the pixel circuit into the digital signal in the solid-state imaging device so that an influence such as the stray capacity can be curbed (See Patent reference 1: Japanese Unexamined Patent Application Publication No. 2005-323331, for example).
FIG. 1 is a schematic view showing a structure of an essential part of the solid-state imaging device disclosed in Patent reference 1. This solid-state imaging device converts a signal voltage obtained from a pixel circuit 92 into a digital signal through integrating type AD conversion. An outline of the operations of this solid-state imaging device shall be described.
The pixel circuit 92 in an imaging unit 91 applies the signal voltage obtained through photo electrical conversion to one end of the input terminal in a voltage comparing unit 93. A reference signal generating unit 95 generates: a staircase ramp wave RAMP descending in synchronism with a clock signal CK sent from a controlling unit 94, using, for example, a DA (digital-analog) conversion unit; and applies to another end of the input terminal in the voltage comparing unit 93.
A counter unit 96 dynamically starts counting the clock signal CK when the ramp wave RAMP starts descending. When a signal, indicating that a level of the ramp wave RAMP coincides with the signal voltage from the pixel circuit 92, is sent from the voltage comparing unit 93, a count value at the moment is outputted as the digital signal indicating the signal voltage from the pixel circuit 92.